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FAST CMOS OCTAL D REGISTERS (3-STATE)
Integrated Device Technology, Inc.
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT IDT54/74FCT534T/AT/CT IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FEATURES:
* Common features: - Low input and output leakage 1A (max.) - CMOS power levels - True TTL input and output compatibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) - Meets or exceeds JEDEC standard 18 specifications - Product available in Radiation Tolerant and Radiation Enhanced versions - Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) - Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages * Features for FCT374T/FCT534T/FCT574T: - Std., A, C and D speed grades - High drive outputs (-15mA IOH, 48mA IOL) * Features for FCT2374T/FCT2574T: - Std., A, and C speed grades - Resistor outputs (-15mA IOH, 12mA IOL Com.) (-12mA IOH, 12mA IOL Mil.) - Reduced system switching noise
DESCRIPTION
The FCT374T/FCT2374T, FCT534T and FCT574T/ FCT2574T are 8-bit registers built using an advanced dual metal CMOS technology. These registers consist of eight Dtype flip-flops with a buffered common clock and buffered 3state output control. When the output enable (OE) input is LOW, the eight outputs are enabled. When the OE input is HIGH, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the Q outputs on the LOW-toHIGH transition of the clock input. The FCT2374T and FCT2574T have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2xxxT parts are plug-in replacements for FCTxxxT parts.
FUNCTIONAL BLOCK DIAGRAM FCT374/FCT2374T AND FCT574/FCT2574T
D0 CP CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q D1 D2 D3 D4 D5 D6 D7
OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
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FUNCTIONAL BLOCK DIAGRAM FCT534T
D0 CP CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q D1 D2 D3 D4 D5 D6 D7
OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1995 Integrated Device Technology, Inc.
AUGUST 1995
DSC-4214/5
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT374T
1 2 3 4 5 6 7 8 9 10 20 19 P20-1 D20-1 SO20-2 SO20-7 SO20-8 & E20-1 18 17 16 15 14 13 12 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP
OE Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND
3 D1 Q1 Q2 D2 D3 4 5 6 7 8
Q0 OE
2 1
D0
INDEX
VCC Q7
20 19 18 17 16 15
D7 D6 Q6 Q5 D5
L20-2
14 9 10 11 12 13
GND
CP
Q3
Q4
D4
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DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW
LCC TOP VIEW
IDT54/74FCT574T
VCC OE
1 INDEX
D1
D0
OE D0 D1 D2 D3 D4 D5 D6 D7 GND
1 2 3 4 5 6 7 8 9 10
20 19 P20-1 18 D20-1 17 SO20-2 16 SO20-7 15 SO20-8 14 & E20-1 13 12 11
VCC Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 CP
32 D2 D3 D4 D5 D6 4 5 6 7 8
20 19 18 17 16 15 14
Q0
Q1 Q2 Q3 Q4 Q5
L20-2
9 10 11 12 13
D7
GND
CP
Q7 Q6
DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW
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LCC TOP VIEW
IDT54/74FCT534T
Q0 OE
1
OE Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND
1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 SO20-8 & E20-1
20 19 18 17 16 15 14 13 12 11
VCC Q7 D7 D6 Q6 Q5 D5 D4
GND
32 D1 Q1 Q2 D2 D3 4 5 6 7 8 L20-2 20 19 18 17 16 15 14 9 10 11 12 13 D7 D6 Q6 Q5 D5
D0
INDEX
Q4 CP
CP Q4 D4
Q3
VCC Q7
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DIP/SOIC/QSOP/CERPACK TOP VIEW
LCC TOP VIEW
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names DN CP QN Description D flip-flop data inputs Clock Pulse for the register. Enters data on LOW-to-HIGH transition. 3-state outputs, (true) 3-state outputs, (inverted) Active LOW 3-state Output Enable input
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QN OE
FUNCTION TABLE(1)
534 Inputs Function
HI-Z LOAD REGISTER
Outputs DN X X L H L H
Internal QN NC NC L H L H
374/574 Outputs Internal QN Z Z L H Z Z
OE
H H L L H H
CP L H
QN
Z Z H L Z Z
QN
NC NC H L H L
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NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance NC = No Change = LOW-to-HIGH transition
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND VTERM(3) Terminal Voltage -0.5 to with Respect to VCC +0.5 GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current -60 to +120 Military -0.5 to +7.0 Unit V
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. Unit 10 pF 12
pF
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-0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 0.5 -60 to +120
V C C C W mA
NOTE: 1. This parameter is measured at characterization but not tested.
2569 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only.
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL II VIK VH ICC Parameter Input HIGH Level Input LOW Level Input HIGH Input LOW Current (4) Current (4) VCC = Max. pins) (4) VCC = Min., IIN = -18mA
--
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V VCC = Max., VI = VCC (Max.)
Min. 2.0 -- -- -- -- -- -- -- -- --
Typ.(2) -- -- -- -- -- -- -- -0.7 200 0.01
Max. -- 0.8
Unit V V
1 1 1 1 1
-1.2 -- 1
A A A
V mV mA
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High Impedance Output Current (3-State Output Input HIGH Current (4)
Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
OUTPUT DRIVE CHARACTERISTICS FOR FCT374T/534T/574T
Symbol VOH Parameter Output HIGH Voltage Test Conditions(1) VCC = Min. IOH = -6mA MIL. VIN = VIH or VIL IOH = -8mA COM'L. IOH = -12mA MIL. IOH = -15mA COM'L. VCC = Min. IOL = 32mA MIL. VIN = VIH or VIL IOL = 48mA COM'L. VCC = Max., VO = GND (3) Min. 2.4 2.0 -- -60 Typ.(2) 3.3 3.0 0.3 -120 Max. -- -- 0.5 -225 Unit V V V mA
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VOL IOS
Output LOW Voltage Short Circuit Current
OUTPUT DRIVE CHARACTERISTICS FOR FCT2374T/2574T
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V (3) VCC = 5V, VIN = VIH or V IL, VOUT = 1.5V (3) VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -12mA MIL. IOH = -15mA COM'L. IOL = 12mA Min. 16 -16 2.4 -- Typ.(2) 48 -48 3.3 0.3 Max. -- -- -- 0.50 Unit mA mA V V
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NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C.
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. VIN = VCC VIN = GND Outputs Open OE = GND One Input Toggling 50% Duty Cycle VCC = Max. VIN = VCC VIN = GND Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND VIN = 3.4 fi = 5MHz VIN = GND 50% Duty Cycle One Bit Toggling VCC = Max. VIN = VCC VIN = GND Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND VIN = 3.4 Eight Bits Toggling VIN = GND fi = 2.5MHz 50% Duty Cycle Min. -- FCTxxxT FCT2xxxT -- -- Typ.(2) 0.5 0.15 0.06 Max. 2.0 0.25 0.12 Unit mA mA/ MHz
IC
Total Power Supply Current (6)
FCTxxxT FCT2xxxT FCTxxxT FCT2xxxT FCTxxxT FCT2xxxT FCTxxxT FCT2xxxT
-- -- --
1.5 0.6 2.0 1.1
3.5 2.2 5.5 4.2 7.3 (5) 4.0 (5) 16.3 (5) 13.0 (5)
mA
-- -- -- --
3.8 1.5 6.0 3.8
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT374T/534T/574T FCT2374T/2574T Com'l. Mil. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay CP to QN(3) Output Enable Time Output Disable Time Set-up Time HIGH or LOW, DN to CP Hold Time HIGH or LOW, DN to CP CP Pulse Width HIGH or LOW Conditions(1) CL = 50pF RL = 500
Min.(2) Max. Min.(2) Max.
FCT374AT/534AT/574AT FCT2374AT/2574AT Com'l. Mil.
Min.(2) Max. Min.(2) Max.
2.0 1.5 1.5 2.0 1.5 7.0
10.0 12.5 8.0 -- -- --
2.0 1.5 1.5 2.0 1.5 7.0
11.0 14.0 8.0 -- -- --
2.0 1.5 1.5 2.0 1.5 5.0
6.5 6.5 5.5 -- -- --
2.0 1.5 1.5 2.0 1.5 6.0
7.2 7.5 6.5 -- -- --
Unit ns ns ns ns ns ns
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FCT374CT/534CT/574CT FCT2374CT/2574CT Com'l. Mil. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay CP to QN(3) Output Enable Time Output Disable Time Set-up Time HIGH or LOW, DN to CP Hold Time HIGH or LOW, DN to CP CP Pulse Width HIGH or LOW(4) Conditions(1) CL = 50pF RL = 500
Min.(2) Max. Min.(2) Max.
FCT374DT/574DT Com'l. Mil.
Min.(2) Max. Min.(2) Max.
2.0 1.5 1.5 2.0 1.5 5.0
5.2 5.5 5.0 -- -- --
2.0 1.5 1.5 2.0 1.5 6.0
6.2 6.2 5.7 -- -- --
2.0 1.5 1.5 2.0 1.0 3.0
4.2 4.8 4.0 -- -- --
-- -- -- -- -- --
-- -- -- -- -- --
Unit ns ns ns ns ns ns
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NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. ON for FCT374/2374T and FCT574/2574T, ON for FCT534T. 4. This parameter is guaranteed but not tested.
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL
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SWITCH POSITION
7.0V
Test Open Drain Disable Low Enable Low All Other Tests
Switch
Closed Open
VOUT
500
DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
SET-UP, HOLD AND RELEASE TIMES
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
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PULSE WIDTH
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU
tH
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
tREM
1.5V
tSU
tH
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PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 1.5V 0V 3.5V 1.5V tPHZ 0.3V VOH 0V
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SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL
3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
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tPLZ
1.5V 0V 3.5V 0.3V VOL
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT FAST CMOS OCTAL D REGISTERS (3-STATE) MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX X FCT Family Temp. Range
XXXX Device Type
X Package
X Process Blank B P D SO L E PY Q 374T 574T 534T 374AT 574AT 534AT 374CT 574CT 534CT 374DT 574DT Blank 2 54 74 Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Shrink Small Outline Package Quarter-size Small Outline Package Non-Inverting Octal D Register Non-Inverting Octal D Register Inverting Octal D Register
High Drive Balanced Drive -55C to +125C 0C to +70C
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